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INTEGRATED CIRCUITS
74ABT377A Octal D-type flip-flop with enable
Product specification Replaces data sheet 74ABT377 of 1995 Sep 06 IC23 Data Handbook 1997 Feb 26
Philips Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
FEATURES
* Ideal for addressable register applications * 8-bit positive edge-triggered register * Enable for address and data synchronization applications * Output capability: +64mA/-32mA * Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT377A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low. The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop's Q output. The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.
* Power-up reset
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN ICCH PARAMETER Propagation delay CP to Qn Input capacitance Total current supply CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC Outputs High; VCC = 5.5V TYPICAL 3.1 3.6 4 500 UNIT ns pF nA
ORDERING INFORMATION
PACKAGES 20-Pin Plastic DIP 20-Pin plastic SO 20-Pin Plastic SSOP Type II 20-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ABT377A N 74ABT377A D 74ABT377A DB 74ABT377A PW NORTH AMERICA 74ABT377A N 74ABT377A D 74ABT377A DB 74ABT377PWA DH DWG NUMBER SOT146-1 SOT163-1 SOT339-1 SOT360-1
PIN CONFIGURATION
LOGIC SYMBOL
E Q0
1 2
20 VCC 19 Q7 18 D7 17 D6 16 Q6 15 Q5 14 D5 13 D4 12 Q4 11 CP 2 5 6 9 12 15 16 19 11 D0 CP D1 D2 D3 D4 D5 D6 D7 3 4 7 8 13 14 17 18
D0 3 D1 4 Q1 Q2 5 6
1
OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
D2 7 D3 8 Q3 9
GND 10
SA00155
SA00152
1997 Feb 26
2
853-1457 17800
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
LOGIC SYMBOL (IEEE/IEC)
PIN DESCRIPTION
PIN NUMBER 1 SYMBOL E D0-D7 Q0-Q7 CP GND VCC FUNCTION Enable input (active-Low) Data inputs Data outputs Clock Pulse input (active rising edge) Ground (0V) Positive supply voltage
1 11
G1 IC2
3, 4, 7, 8, 13, 14, 17, 18 2, 5, 6, 9, 12, 15, 16, 19
3 4 7 8 13 14 17 18
2D
2
11
5 6 9 12 15 16 19
10 20
SA00157
LOGIC DIAGRAM
D0 3 1 E D1 4 D2 7 D3 8 D4 13 D5 14 D6 17 D7 18
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
D CP
Q
CP
11 2 Q0 5 Q1 6 Q2 9 Q3 12 Q4 15 Q5 16 Q6 19 Q7
SA00158
1997 Feb 26
3
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
FUNCTION TABLE
INPUTS E l l CP Dn h l OUTPUTS Qn H L Load "1" Load "0" Hold (do nothing) OPERATING MODE
H h L l X
= = = = = =
h X no change H X X no change High voltage level High voltage level one set-up time prior to the Low-to-High clock transition Low voltage level Low voltage level one set-up time prior to the Low-to-High clock transition Don't care Low-to-High clock transition
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING -0.5 to +7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 128 -65 to 150 UNIT V mA V mA V mA C
DC output diode current DC output voltage3 DC output current Storage temperature range
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 -40 4.5 0 2.0 0.8 -32 64 5 +85 LIMITS MAX 5.5 VCC V V V V mA mA ns/V C UNIT
1997 Feb 26
4
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C MIN VIK Input clamp voltage VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or VIH VCC = 4.5V; IOH = -32mA; VI = VIL or VIH VOL VRST II IOFF ICEX IO ICCH ICCL ICC Additional supply current per input pin2 Low-level output voltage Power-up output low voltage3 Input leakage current Power-off leakage current Output High leakage current Output current1 VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VO or VI 4.5V VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND -50 2.5 3.0 2.0 TYP -0.9 2.9 3.4 2.4 0.42 0.13 0.01 5.0 5.0 -100 0.5 24 0.5 0.55 0.55 1.0 100 50 -180 250 30 1.5 -50 MAX -1.2 2.5 3.0 2.0 0.55 0.55 1.0 100 50 -180 250 30 1.5 Tamb = -40C to +85C MIN MAX -1.2 V V V V V V A A A mA A mA mA UNIT
Quiescent supply current
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS1 SYMBOL PARAMETER WAVEFORM MIN fMAX Maximum clock frequency 1 1 150 1.8 2.2 Tamb = +25oC VCC = +5.0V TYP 250 3.1 3.6 4.0 4.7 MAX Tamb = -40 to +85oC VCC = +5.0V +0.5V MIN 150 1.8 2.2 4.8 4.9 MAX MHz ns UNIT
tPLH Propagation delay tPHL CP to Qn NOTE: 1. Limits may vary among suppliers.
1997 Feb 26
5
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Tamb = VCC = +5.0V MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP Setup time, High or Low E to CP Hold time, High or Low E to CP Clock Pulse width High or Low 2 2 2 2 1 1.5 1.5 1.0 1.0 2.0 2.0 1.0 1.0 1.5 2.0 +25oC TYP 0.7 0.5 -0.4 -0.6 1.1 1.0 -0.9 -0.1 0.7 1.0 Tamb = -40 to +85oC VCC = +5.0V +0.5V MIN 1.5 1.5 1.0 1.0 2.0 2.0 1.0 1.0 1.5 2.0 ns ns ns ns ns UNIT
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX
CP
VM tW(H) tPHL tW(L)
VM
tPLH VM VM
Qn
SA00159
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width and Maximum Clock Frequency
Waveform 2. Data and Enable Setup and Hold Times
1997 Feb 26
6
EEEE EEEEEEEEEE EEEE EEEEEEEEEE EEEEEEEEE EEE EEEEEEEEE EEE EEEEEEEEE EEE
Dn VM VM th ts E VM VM VM VM th(L) th(H) ts(L) ts(H) CP VM VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SA00160
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
TEST CIRCUIT AND WAVEFORM
VCC 7.0V RL 90% NEGATIVE PULSE VM 10% tTHL (tF) CL RL POSITIVE PULSE 10% tW tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
PULSE GENERATOR
VIN D.U.T. RT
VOUT
Test Circuit for 3-State Outputs
VM
SWITCH POSITION
TEST All SWITCH open
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns
SA00057
1997 Feb 26
7
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377A
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A.
Philips Semiconductors
1997 Feb 26 8
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
1995 Sep 06
9
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1995 Sep 06
10
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
1995 Sep 06
11
Philips Semiconductors
Product specification
Octal D-type flip-flop with enable
74ABT377
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
1995 Sep 06
12

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